PLLs are used in virtually every IC. This makes them a critical element in any IC design. Migration of common structures and formats from one design to the next can play a major role in minimizing the risk of human error in executing new designs. CEVAs PLL compiler does exactly that. Across different designs and even different process you will find that all our PLLs have the same "look and feel" making it easier for you to become familiar with the integration of our technology into your designs.

To make this technology easily accessible to you we created PLLXpert Online, our unique PLL compiler concept. PLLXpert Online has a user-friendly interface which makes it easy for you to design PLLs to your requirements using CEVA's background IP. PLLXpert Online enables you to make key design decisions about your PLL and ASIC specifications in real time without waiting days for vendor feedback to PLL performance inquiries.

Key features of PLLXpert Online include:

User-friendly design interface to the PLLXpert Online compiler

Ability to design PLLs on multiple foundry processes from 0.25um to 0.13um

Facility to load and modify reference designs already created by CEVA

Ability to re-load and modify previous designs executed by you

Receive front end deliverables which are generated and delivered by e-mail to all users (datasheets, Verilog behavioral models, Lib and Lef files)

IP Core deliverables (CDL and GDSII) can be delivered by CEVA in one day.